CVE-2023-34326 (GCVE-0-2023-34326)

Vulnerability from cvelistv5 – Published: 2024-01-05 16:30 – Updated: 2025-11-04 19:16
VLAI?
Title
x86/AMD: missing IOMMU TLB flushing
Summary
The caching invalidation guidelines from the AMD-Vi specification (48882—Rev 3.07-PUB—Oct 2022) is incorrect on some hardware, as devices will malfunction (see stale DMA mappings) if some fields of the DTE are updated but the IOMMU TLB is not flushed. Such stale DMA mappings can point to memory ranges not owned by the guest, thus allowing access to unindented memory regions.
Severity ?
7.8 (High)
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H
CWE
  • CWE-672 - Operation on a Resource after Expiration or Release
Assigner
XEN
References
Impacted products
Vendor Product Version
Xen Xen Unknown: consult Xen advisory XSA-442
Create a notification for this product.
Credits
This issue was discovered by Roger Pau Monné of XenServer.
Show details on NVD website
To clipboard 

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  • Seen: The vulnerability was mentioned, discussed, or observed by the user.
  • Confirmed: The vulnerability has been validated from an analyst's perspective.
  • Published Proof of Concept: A public proof of concept is available for this vulnerability.
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